\doxysubsubsubsection{SYSCFG Exported Macros }
\hypertarget{group___s_y_s_c_f_g___exported___macros}{}\label{group___s_y_s_c_f_g___exported___macros}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___exported___macros_ga616c0ad7439136d834bde7b8a09f1483}{\+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+AXISRAM\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK}}()
\begin{DoxyCompactList}\small\item\em SYSCFG Break AXIRAM double ECC lock. Enable and lock the connection of AXIRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___exported___macros_ga769a292bedba6880bf86c176171d6779}{\+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+ITCM\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK}}()
\begin{DoxyCompactList}\small\item\em SYSCFG Break ITCM double ECC lock. Enable and lock the connection of ITCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___exported___macros_ga12296c107679f5f133e1d1583d29f94b}{\+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+DTCM\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK}}()
\begin{DoxyCompactList}\small\item\em SYSCFG Break DTCM double ECC lock. Enable and lock the connection of DTCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___exported___macros_ga38c42933475b0bc006e11dbd6be2bf0f}{\+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+SRAM1\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK}}()
\begin{DoxyCompactList}\small\item\em SYSCFG Break SRAM1 double ECC lock. Enable and lock the connection of SRAM1 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___exported___macros_gafbe869a5b559936b60104d5ea4fb3a06}{\+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+SRAM2\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK}}()
\begin{DoxyCompactList}\small\item\em SYSCFG Break SRAM2 double ECC lock. Enable and lock the connection of SRAM2 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___exported___macros_ga62fcc98e1bc68ef66a77e5c7e4cdee52}{\+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+SRAM3\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK}}()
\begin{DoxyCompactList}\small\item\em SYSCFG Break SRAM3 double ECC lock. Enable and lock the connection of SRAM3 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___exported___macros_gae01ffb633dfd94927bb9dcec5a0f3632}{\+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+SRAM4\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK}}()
\begin{DoxyCompactList}\small\item\em SYSCFG Break SRAM4 double ECC lock. Enable and lock the connection of SRAM4 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___exported___macros_gaf9481d90345878e86cef9c0dbae9615c}{\+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+BKRAM\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK}}()
\begin{DoxyCompactList}\small\item\em SYSCFG Break Backup SRAM double ECC lock. Enable and lock the connection of Backup SRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___exported___macros_gafab3caecc6a715d033275377215142ea}{\+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+CM7\+\_\+\+LOCKUP\+\_\+\+LOCK}}()
\begin{DoxyCompactList}\small\item\em SYSCFG Break Cortex-\/\+M7 Lockup lock. Enable and lock the connection of Cortex-\/\+M7 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___exported___macros_gacfcda24922d87045f660bbd4a482abc4}{\+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+FLASH\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK}}()
\begin{DoxyCompactList}\small\item\em SYSCFG Break FLASH double ECC lock. Enable and lock the connection of Flash double ECC error connection to TIM1/8/15/16/17 and HRTIMER Break input. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___exported___macros_gadfaca1cb2ee6df46e27aead12fe01e0c}{\+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+PVD\+\_\+\+LOCK}}()
\begin{DoxyCompactList}\small\item\em SYSCFG Break PVD lock. Enable and lock the PVD connection to Timer1/8/15/16/17 and HRTIMER Break input, as well as the PVDE and PLS\mbox{[}2\+:0\mbox{]} in the PWR\+\_\+\+CR1 register. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___exported___macros_ga61181f4b4955f17858475485f8cd366c}{\+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+ENABLE}}(\+\_\+\+\_\+\+FASTMODEPLUS\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Fast-\/mode Plus driving capability enable/disable macros. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___exported___macros_ga5f20cbc8ad78101d527209003dc014f2}{\+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+DISABLE}}(\+\_\+\+\_\+\+FASTMODEPLUS\+\_\+\+\_\+)
\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}


\label{doc-define-members}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_doc-define-members}
\doxysubsubsubsubsection{Macro Definition Documentation}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_ga616c0ad7439136d834bde7b8a09f1483}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}!\_\_HAL\_SYSCFG\_BREAK\_AXISRAM\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_AXISRAM\_DBL\_ECC\_LOCK}}
\index{\_\_HAL\_SYSCFG\_BREAK\_AXISRAM\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_AXISRAM\_DBL\_ECC\_LOCK}!SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_SYSCFG\_BREAK\_AXISRAM\_DBL\_ECC\_LOCK}{\_\_HAL\_SYSCFG\_BREAK\_AXISRAM\_DBL\_ECC\_LOCK}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___exported___macros_ga616c0ad7439136d834bde7b8a09f1483} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+AXISRAM\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK(\begin{DoxyParamCaption}{}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{SET\_BIT(SYSCFG-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga57279acfc068c3e8ab4e1fe47b0bcd57}{SYSCFG\_CFGR\_AXISRAML}})}

\end{DoxyCode}


SYSCFG Break AXIRAM double ECC lock. Enable and lock the connection of AXIRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. 

\begin{DoxyNote}{Note}
The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32\+H7 rev.\+B and above. 
\end{DoxyNote}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_gaf9481d90345878e86cef9c0dbae9615c}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}!\_\_HAL\_SYSCFG\_BREAK\_BKRAM\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_BKRAM\_DBL\_ECC\_LOCK}}
\index{\_\_HAL\_SYSCFG\_BREAK\_BKRAM\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_BKRAM\_DBL\_ECC\_LOCK}!SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_SYSCFG\_BREAK\_BKRAM\_DBL\_ECC\_LOCK}{\_\_HAL\_SYSCFG\_BREAK\_BKRAM\_DBL\_ECC\_LOCK}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___exported___macros_gaf9481d90345878e86cef9c0dbae9615c} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+BKRAM\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK(\begin{DoxyParamCaption}{}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{SET\_BIT(SYSCFG-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga171746fd5059701bf7475dd7b19a4499}{SYSCFG\_CFGR\_BKRAML}})}

\end{DoxyCode}


SYSCFG Break Backup SRAM double ECC lock. Enable and lock the connection of Backup SRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. 

\begin{DoxyNote}{Note}
The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32\+H7 rev.\+B and above. 
\end{DoxyNote}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_gafab3caecc6a715d033275377215142ea}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}!\_\_HAL\_SYSCFG\_BREAK\_CM7\_LOCKUP\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_CM7\_LOCKUP\_LOCK}}
\index{\_\_HAL\_SYSCFG\_BREAK\_CM7\_LOCKUP\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_CM7\_LOCKUP\_LOCK}!SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_SYSCFG\_BREAK\_CM7\_LOCKUP\_LOCK}{\_\_HAL\_SYSCFG\_BREAK\_CM7\_LOCKUP\_LOCK}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___exported___macros_gafab3caecc6a715d033275377215142ea} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+CM7\+\_\+\+LOCKUP\+\_\+\+LOCK(\begin{DoxyParamCaption}{}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{SET\_BIT(SYSCFG-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga687d5e366cf578d8c99c0c9a42594a66}{SYSCFG\_CFGR\_CM7L}})}

\end{DoxyCode}


SYSCFG Break Cortex-\/\+M7 Lockup lock. Enable and lock the connection of Cortex-\/\+M7 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input. 

\begin{DoxyNote}{Note}
The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32\+H7 rev.\+B and above. 
\end{DoxyNote}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_ga12296c107679f5f133e1d1583d29f94b}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}!\_\_HAL\_SYSCFG\_BREAK\_DTCM\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_DTCM\_DBL\_ECC\_LOCK}}
\index{\_\_HAL\_SYSCFG\_BREAK\_DTCM\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_DTCM\_DBL\_ECC\_LOCK}!SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_SYSCFG\_BREAK\_DTCM\_DBL\_ECC\_LOCK}{\_\_HAL\_SYSCFG\_BREAK\_DTCM\_DBL\_ECC\_LOCK}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___exported___macros_ga12296c107679f5f133e1d1583d29f94b} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+DTCM\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK(\begin{DoxyParamCaption}{}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{SET\_BIT(SYSCFG-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga35969855605eecc54ae2e1c6b757b6e0}{SYSCFG\_CFGR\_DTCML}})}

\end{DoxyCode}


SYSCFG Break DTCM double ECC lock. Enable and lock the connection of DTCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. 

\begin{DoxyNote}{Note}
The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32\+H7 rev.\+B and above. 
\end{DoxyNote}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_gacfcda24922d87045f660bbd4a482abc4}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}!\_\_HAL\_SYSCFG\_BREAK\_FLASH\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_FLASH\_DBL\_ECC\_LOCK}}
\index{\_\_HAL\_SYSCFG\_BREAK\_FLASH\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_FLASH\_DBL\_ECC\_LOCK}!SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_SYSCFG\_BREAK\_FLASH\_DBL\_ECC\_LOCK}{\_\_HAL\_SYSCFG\_BREAK\_FLASH\_DBL\_ECC\_LOCK}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___exported___macros_gacfcda24922d87045f660bbd4a482abc4} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+FLASH\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK(\begin{DoxyParamCaption}{}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{SET\_BIT(SYSCFG-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga941ad57bf7d854c202923dfaef8ba4c3}{SYSCFG\_CFGR\_FLASHL}})}

\end{DoxyCode}


SYSCFG Break FLASH double ECC lock. Enable and lock the connection of Flash double ECC error connection to TIM1/8/15/16/17 and HRTIMER Break input. 

\begin{DoxyNote}{Note}
The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32\+H7 rev.\+B and above. 
\end{DoxyNote}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_ga769a292bedba6880bf86c176171d6779}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}!\_\_HAL\_SYSCFG\_BREAK\_ITCM\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_ITCM\_DBL\_ECC\_LOCK}}
\index{\_\_HAL\_SYSCFG\_BREAK\_ITCM\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_ITCM\_DBL\_ECC\_LOCK}!SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_SYSCFG\_BREAK\_ITCM\_DBL\_ECC\_LOCK}{\_\_HAL\_SYSCFG\_BREAK\_ITCM\_DBL\_ECC\_LOCK}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___exported___macros_ga769a292bedba6880bf86c176171d6779} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+ITCM\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK(\begin{DoxyParamCaption}{}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{SET\_BIT(SYSCFG-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga80f8e470cde2a18d5e90d8826333db01}{SYSCFG\_CFGR\_ITCML}})}

\end{DoxyCode}


SYSCFG Break ITCM double ECC lock. Enable and lock the connection of ITCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. 

\begin{DoxyNote}{Note}
The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32\+H7 rev.\+B and above. 
\end{DoxyNote}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_gadfaca1cb2ee6df46e27aead12fe01e0c}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}!\_\_HAL\_SYSCFG\_BREAK\_PVD\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_PVD\_LOCK}}
\index{\_\_HAL\_SYSCFG\_BREAK\_PVD\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_PVD\_LOCK}!SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_SYSCFG\_BREAK\_PVD\_LOCK}{\_\_HAL\_SYSCFG\_BREAK\_PVD\_LOCK}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___exported___macros_gadfaca1cb2ee6df46e27aead12fe01e0c} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+PVD\+\_\+\+LOCK(\begin{DoxyParamCaption}{}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{SET\_BIT(SYSCFG-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gabe872acc2230f4a9c8c61d0becd4a85b}{SYSCFG\_CFGR\_PVDL}})}

\end{DoxyCode}


SYSCFG Break PVD lock. Enable and lock the PVD connection to Timer1/8/15/16/17 and HRTIMER Break input, as well as the PVDE and PLS\mbox{[}2\+:0\mbox{]} in the PWR\+\_\+\+CR1 register. 

\begin{DoxyNote}{Note}
The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32\+H7 rev.\+B and above. 
\end{DoxyNote}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_ga38c42933475b0bc006e11dbd6be2bf0f}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}!\_\_HAL\_SYSCFG\_BREAK\_SRAM1\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_SRAM1\_DBL\_ECC\_LOCK}}
\index{\_\_HAL\_SYSCFG\_BREAK\_SRAM1\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_SRAM1\_DBL\_ECC\_LOCK}!SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_SYSCFG\_BREAK\_SRAM1\_DBL\_ECC\_LOCK}{\_\_HAL\_SYSCFG\_BREAK\_SRAM1\_DBL\_ECC\_LOCK}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___exported___macros_ga38c42933475b0bc006e11dbd6be2bf0f} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+SRAM1\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK(\begin{DoxyParamCaption}{}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{SET\_BIT(SYSCFG-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9ab30a57911f15034778a70815774d8b}{SYSCFG\_CFGR\_SRAM1L}})}

\end{DoxyCode}


SYSCFG Break SRAM1 double ECC lock. Enable and lock the connection of SRAM1 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. 

\begin{DoxyNote}{Note}
The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32\+H7 rev.\+B and above. 
\end{DoxyNote}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_gafbe869a5b559936b60104d5ea4fb3a06}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}!\_\_HAL\_SYSCFG\_BREAK\_SRAM2\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_SRAM2\_DBL\_ECC\_LOCK}}
\index{\_\_HAL\_SYSCFG\_BREAK\_SRAM2\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_SRAM2\_DBL\_ECC\_LOCK}!SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_SYSCFG\_BREAK\_SRAM2\_DBL\_ECC\_LOCK}{\_\_HAL\_SYSCFG\_BREAK\_SRAM2\_DBL\_ECC\_LOCK}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___exported___macros_gafbe869a5b559936b60104d5ea4fb3a06} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+SRAM2\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK(\begin{DoxyParamCaption}{}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{SET\_BIT(SYSCFG-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga93a1e04d5e85ec61347d0bd7cd1dbffb}{SYSCFG\_CFGR\_SRAM2L}})}

\end{DoxyCode}


SYSCFG Break SRAM2 double ECC lock. Enable and lock the connection of SRAM2 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. 

\begin{DoxyNote}{Note}
The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32\+H7 rev.\+B and above. 
\end{DoxyNote}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_ga62fcc98e1bc68ef66a77e5c7e4cdee52}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}!\_\_HAL\_SYSCFG\_BREAK\_SRAM3\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_SRAM3\_DBL\_ECC\_LOCK}}
\index{\_\_HAL\_SYSCFG\_BREAK\_SRAM3\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_SRAM3\_DBL\_ECC\_LOCK}!SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_SYSCFG\_BREAK\_SRAM3\_DBL\_ECC\_LOCK}{\_\_HAL\_SYSCFG\_BREAK\_SRAM3\_DBL\_ECC\_LOCK}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___exported___macros_ga62fcc98e1bc68ef66a77e5c7e4cdee52} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+SRAM3\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK(\begin{DoxyParamCaption}{}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{SET\_BIT(SYSCFG-\/>CFGR,\ SYSCFG\_CFGR\_SRAM3L)}

\end{DoxyCode}


SYSCFG Break SRAM3 double ECC lock. Enable and lock the connection of SRAM3 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. 

\begin{DoxyNote}{Note}
The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32\+H7 rev.\+B and above. 
\end{DoxyNote}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_gae01ffb633dfd94927bb9dcec5a0f3632}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}!\_\_HAL\_SYSCFG\_BREAK\_SRAM4\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_SRAM4\_DBL\_ECC\_LOCK}}
\index{\_\_HAL\_SYSCFG\_BREAK\_SRAM4\_DBL\_ECC\_LOCK@{\_\_HAL\_SYSCFG\_BREAK\_SRAM4\_DBL\_ECC\_LOCK}!SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_SYSCFG\_BREAK\_SRAM4\_DBL\_ECC\_LOCK}{\_\_HAL\_SYSCFG\_BREAK\_SRAM4\_DBL\_ECC\_LOCK}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___exported___macros_gae01ffb633dfd94927bb9dcec5a0f3632} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+BREAK\+\_\+\+SRAM4\+\_\+\+DBL\+\_\+\+ECC\+\_\+\+LOCK(\begin{DoxyParamCaption}{}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{SET\_BIT(SYSCFG-\/>CFGR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga060b71d107d9153ac506ed6076fac455}{SYSCFG\_CFGR\_SRAM4L}})}

\end{DoxyCode}


SYSCFG Break SRAM4 double ECC lock. Enable and lock the connection of SRAM4 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. 

\begin{DoxyNote}{Note}
The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32\+H7 rev.\+B and above. 
\end{DoxyNote}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_ga5f20cbc8ad78101d527209003dc014f2}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}!\_\_HAL\_SYSCFG\_FASTMODEPLUS\_DISABLE@{\_\_HAL\_SYSCFG\_FASTMODEPLUS\_DISABLE}}
\index{\_\_HAL\_SYSCFG\_FASTMODEPLUS\_DISABLE@{\_\_HAL\_SYSCFG\_FASTMODEPLUS\_DISABLE}!SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_SYSCFG\_FASTMODEPLUS\_DISABLE}{\_\_HAL\_SYSCFG\_FASTMODEPLUS\_DISABLE}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___exported___macros_ga5f20cbc8ad78101d527209003dc014f2} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+DISABLE(\begin{DoxyParamCaption}\item[{}]{\+\_\+\+\_\+\+FASTMODEPLUS\+\_\+\+\_\+}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \textcolor{keywordflow}{do}\ \{\mbox{\hyperlink{stm32h7xx__hal__conf_8h_a631dea7b230e600555f979c62af1de21}{assert\_param}}(IS\_SYSCFG\_FASTMODEPLUS((\_\_FASTMODEPLUS\_\_)));\(\backslash\)}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ CLEAR\_BIT(SYSCFG-\/>PMCR,\ (\_\_FASTMODEPLUS\_\_));\(\backslash\)}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \}\textcolor{keywordflow}{while}(0)}

\end{DoxyCode}
\Hypertarget{group___s_y_s_c_f_g___exported___macros_ga61181f4b4955f17858475485f8cd366c}\index{SYSCFG Exported Macros@{SYSCFG Exported Macros}!\_\_HAL\_SYSCFG\_FASTMODEPLUS\_ENABLE@{\_\_HAL\_SYSCFG\_FASTMODEPLUS\_ENABLE}}
\index{\_\_HAL\_SYSCFG\_FASTMODEPLUS\_ENABLE@{\_\_HAL\_SYSCFG\_FASTMODEPLUS\_ENABLE}!SYSCFG Exported Macros@{SYSCFG Exported Macros}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_SYSCFG\_FASTMODEPLUS\_ENABLE}{\_\_HAL\_SYSCFG\_FASTMODEPLUS\_ENABLE}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___exported___macros_ga61181f4b4955f17858475485f8cd366c} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+ENABLE(\begin{DoxyParamCaption}\item[{}]{\+\_\+\+\_\+\+FASTMODEPLUS\+\_\+\+\_\+}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \textcolor{keywordflow}{do}\ \{\mbox{\hyperlink{stm32h7xx__hal__conf_8h_a631dea7b230e600555f979c62af1de21}{assert\_param}}(IS\_SYSCFG\_FASTMODEPLUS((\_\_FASTMODEPLUS\_\_)));\(\backslash\)}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ SET\_BIT(SYSCFG-\/>PMCR,\ (\_\_FASTMODEPLUS\_\_));\(\backslash\)}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \}\textcolor{keywordflow}{while}(0)}

\end{DoxyCode}


Fast-\/mode Plus driving capability enable/disable macros. 


\begin{DoxyParams}{Parameters}
{\em \+\_\+\+\_\+\+FASTMODEPLUS\+\_\+\+\_\+} & This parameter can be a value of \+: \begin{DoxyItemize}
\item \doxylink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga1f9beaf68b00ae5598cb8d930da05704}{SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+PB6} Fast-\/mode Plus driving capability activation on PB6 \item \doxylink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga4b939ef5ec69e81277ef2323d5917eb5}{SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+PB7} Fast-\/mode Plus driving capability activation on PB7 \item \doxylink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga2cd8442a02f25ed8e7e0ba6e5723edd4}{SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+PB8} Fast-\/mode Plus driving capability activation on PB8 \item \doxylink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga71c50ae2406cd9b6dff73cd9cd189c3d}{SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+PB9} Fast-\/mode Plus driving capability activation on PB9 \end{DoxyItemize}
\\
\hline
\end{DoxyParams}
